News Coverage

• May 01, 2010: EDACafe: NVIDIA Extends Breker Verification Deployment to Next Generation GPU

  NVIDIA Extends Breker Verification Deployment to Next Generation GPU

  
  

  Austin , TX . May 2010 – Breker Verification Systems, the SOC Verification Company, announces that NVIDIA Corporation (NVDA), the world leader in visual computing technologies, has selected Trek for use in verification of their next generation Graphics Processing Unit (GPU) family. This selection comes after successful deployment of Trek on a system interface unit.

   

  “NVIDIA designs some of the world’s largest and most complex processors, so efficient verification methodologies are essential”, said Jonah Alben, Senior Vice President at NVIDIA. “We have seen 2x improvements in verification productivity using Trek, and are now using it in key areas of future GPU projects.”

   

  Trek is a model based test generation tool that allows the verification engineer to capture their intent more quickly and with less code. The ability to visualize the model with graphs also allows the DV engineer to communicate more effectively with architects and designers. “NVIDIA, like our other Trek customers, is experiencing significant returns on investment”, said Adnan Hamid, CEO of Breker Verification. “With an average 2X improvement in verification productivity and less ninfrastructure code to write, companies like NVIDIA are better positioned to continue their market leadership.”

   

  About Breker

  Breker Verification Systems is an EDA company offering a model based test generation tool for functional verification focused on System-on- Chip (SOC) verification with IP-to-SOC reuse and pre-silicon to postsilicon reuse. The strength of the technology lies in providing verification engineers with a simple “algebra” to describe their desired verification search space as they visualize it, using a combination of graphs and graph constraints. The tool generates input stimulus, results checks and coverage closure, creating transactional tests at the IP level and C tests at the SOC level. Visual analytical capabilities include interactive rendering of pre-simulation

  reachability analysis and post-simulation coverage results. Privately held, Breker was founded in 2003 in Austin, TX. Its corporate headquarters is at 8217 Edgemoor Place, Austin, Texas 78749. Telephone: (512) 415-1199. On the Web at www.brekersystems.com

  
  

• Feb 01, 2010: EDACafe: Breker Verification Systems’ Trek Selected by STMicroelectronics for Functional Verification Reuse

  Breker Verification Systems’ Trek Selected by STMicroelectronics for Functional Verification Reuse

  
  

  Austin, TX. February 2010 (Businesswire) – Breker Verification Systems, a private supplier of EDA software for functional verification, announced that STMicroelectronics, a global leader in developing and delivering leading edge Systems-on-Chip (SoC) products, has selected Trek to verify complex designs. Trek’s scenario model based testbench automation technology is providing a streamlined solution for automatically generating test stimulus, checking results and providing coverage closure to verify complex chips including cutting edge SoC designs.

  ST performed a comprehensive evaluation of testbench automation technologies and chose Trek because of the efficient development and flexible use of verification scenario models. Some Trek based models have since been deployed into production projects providing immediate positive impact. With easy to understand constructs, graph-based models allow systematic decomposition of functional verification objectives, reduce testbench development time, provide efficient coverage closure measurement and support easy vertical reuse between unit level and system level verification. In the SoC context, IP-Core scenario models can be combined to generate C-code suitable for stressing the complete SoC design.

  “ST welcomes new technologies that increase verification efficiency. Focusing on rapid development, use and reuse of verification models, Trek provides a solution that is complementary to ST’s existing verification flow. It is advantageously replacing directed scenario modeling by graphs, and comes with implicit scenario coverage metrics. Trek is reducing development time, improving coverage and easing communication between the various verification stakeholders,” said Olivier Haller, Verification Methodology Manager at STMicroelectronics. “By allowing verification models to be shared between block level and SoC level testbenches, the Trek technology will help to achieve a higher level of verification on SoC designs and provide a 2-3X reduction of effort.”

  “Continuing to attract industry leaders like STMicroelectronics highlights the depth of the Breker solution,” said Adnan Hamid, CEO of Breker Verification, “With design complexity growing, a more efficient technique for communication, automation and reuse is needed to improve the verification effort. Trek is that solution.”

  ** About Breker Verification Systems **

  Breker Verification Systems is an EDA company offering scenario model based test bench automation technology designed to drive existing functional verification test-benches. Complex verification intent is described as a simple yet concise scenario coverage model. The coverage model is used as input to automatically generate functional stimulus, check results and close coverage. Analytical capabilities include interactive visual rendering of pre-simulation reachability analysis and post simulation coverage analysis. Automating the generation of stimulus, results checks and coverage analysis is can reduce test-bench development time by a factor of 10x, resulting in a 2-3x reduction in overall verification schedules.

  Privately held, Breker was founded in 2003 in Austin, TX. Its corporate headquarters is at 8217 Edgemoor Place, Austin, Texas 78749. Telephone: (512) 415-1199. On the Web at www.brekersystems.com

  
  

Press Releases

• Feb 23, 2011: EDACafe: Breker Verification Exceeds Growth Expectations

  Breker Verification Exceeds Growth Expectations

  
  

  Austin , TX February 23, 2011 -- Austin-based Breker Verification Systems, Inc., an EDA software provider, announced record bookings for 2010. Breker has exceeded revenue expectations through the deployment of its flagship product Trek�, the model-based scenario generator. In the past two years, Breker has established itself as a front-runner in functional verification solutions for complex system-on-ship (SoC) designs.

   

  Through the use of Trek, customers can more efficiently develop scenario models that describe the verification space of the device under test. This model is then used to automatically generate complex tests which include both stimulus and expected results. Because of Trek’s efficiencies, designers can begin testing much earlier * even before RTL is finished * and then expand incrementally to achieve more complete coverage than previously possible.

   

  “We had an outstanding year in 2010,“ said Rick Nordin, VP of Marketing and Business Development at Breker. “Several new customers adopted the Trek generation flow for functional verification which led to the opening of two new support locations in France and India. Plans are also in the works to increase support for US based operations. Our growth is a direct reflection of greater industry need for new techniques and technologies that enhance verification productivity.“

   

  About Breker

  Breker Verification Systems is an EDA company offering a model based test generation tool for functional verification focused on System-on- Chip (SOC) verification with IP-to-SOC reuse and pre-silicon to post-silicon reuse. The strength of the technology lies in providing verification engineers with a simple “algebra“ to describe their desired verification search space as they visualize it, using a combination of graphs and graph constraints. The tool generates input stimulus, results checks and coverage closure, creating transactional tests at the IP level and C tests at the SOC level. Visual analytical capabilities include interactive rendering of pre-simulation reachability analysis and post-simulation coverage results. Privately held, Breker was founded in 2003 in Austin, TX. Its corporate headquarters is at 8217 Edgemoor Place, Austin, Texas 78749. Telephone: (512) 415-1199. On the Web at www.brekersystems.com.

  
  

• Oct 01, 2010: EASii-IC Aligns with Breker Verification for Verification of SoC Designs

  Austin, TX. June 2010 (Businesswire) – Breker Verification Systems, The SOC Verification Company, announces collaborative agreement with EASii-IC, the leading verification consulting company in Europe, to utilize Trek for use in verification/validation consulting engagements. This collaboration comes after multiple successful verification engagements with EASii-IC customers using various IP to SoC
  reuse strategies.
  
  Trek provides a tool agnostic approach to its automated model based test generator enabling a high level of reuse – from the early pre-silicon vertical reuse on design verification to horizontal reuse for post-silicon validation. With the collaboration efforts between Breker and EASii-IC, our customers will see a more effective coverage at all levels of the design.
  
  “EASii IC is focused on ensuring quality and increasing speed to market” said François Cerisier, IC Verification Expert, EASii IC. ” By aligning with Breker, we can provide a higher level of verification efficiency with improved coverage closure in pre-silicon and post-silicon verification activities for our customers.
  
  “Breker is looking forward to teaming up with EASii-IC consulting to rapidly solve
  design challenges associated with SoC verification.”, said Adnan Hamid, CEO of Breker
  Verification. “Our customers will have more experienced resources available to verify
  their designs.”
  
  About Breker
  
  Breker Verification Systems is an EDA company offering a model based test generation tool for functional verification focused on System-on- Chip (SOC) verification with IPto- SOC reuse and pre-silicon to postsilicon reuse. The strength of the technology lies in providing verification engineers with a simple “algebra” to describe their desired verification search space as they visualize it, using a combination of graphs and graph constraints. The tool generates input stimulus, results checks and coverage closure,
  creating transactional tests at the IP level and C tests at the SOC level. Visual analytical
  capabilities include interactive rendering of pre-simulation reachability analysis and post-simulation coverage results. Privately held, Breker was founded in 2003 in Austin, TX. Its corporate headquarters is at 8217 Edgemoor Place, Austin, Texas 78749. Telephone: (512) 415-1199. On the Web at
  www.brekersystems.com